1. Technical Field
The present disclosure refers to a device for measuring the current flowing through a power transistor of a voltage regulator.
2. Description of the Related Art
The use of a device to measure a current flowing through a MOS power transistor connected between the non-regulated input voltage and the regulated output voltage is known in the state of the art; the measurement effectuated by the device allows to limit the current flowing through the power MOS transistor.
A linear voltage regulator according to a prior design is shown in FIG. 1. The regulator includes a MOS power transistor M1 having the drain terminal coupled with an input voltage Vin and the source terminal connected with one terminal of a capacitor CI, connected in parallel to a resistance RI, and having the other terminal connected to ground GND; the output voltage Vout is present across the terminals of the capacitor CI. A voltage divider constituted by two resistance R1 and R2 is arranged parallel to the capacitor CI so that the voltage Vfb, which is a portion of the voltage Vout, is at the input inverting terminal of an error amplifier 1 having the reference voltage Vref at the input non-inverting terminal. The error amplifier 1 is adapted to amplify the difference between the voltages Vref and Vfb, and the output voltage Ver is at the input of a driver 2 generating the voltage Vg for driving the MOS power transistor M1. The error amplifier 1 and the driver 2 are supplied by a supply voltage Vdd and are connected to ground GND.
A limitation circuit is present in the voltage regulator of FIG. 1, which includes a MOS transistor Ms adapted to mirror a portion of the current flowing through the MOS transistor M1. The MOS transistor Ms is of the same type as the MOS transistor M1 and has a smaller size. The size of the transistor Ms is W/L, wherein W/L is the form factor, while the size of the transistor M1 is n*W/L where W and L are the width and the length of the channel. The MOS transistor Ms has the drain terminal connected with the input voltage Vin by means of a resistance Rs and the source terminal is directly connected with the source terminal of the MOS transistor M1. The voltage across the resistance Rs is at the input of another error amplifier 3 having another reference voltage Vrefm at the input. The voltage generated by the error amplifier 3 is sent to the gate terminal of the MOS transistor M1.
This technology is not adapted to the voltage regulators wherein the power MOS transistor M1 has a small on resistance and is capable of providing currents on the order of the Ampere. In fact, the resistance Rs would be of the order of some milliohm to not change the measurement. The power MOS transistor operates in the triode zone when the drain-source voltage Vds is equal to the difference between the gate-source voltage Vgs and the threshold voltage Vt. Since the transistors M1 and Ms are of the same type, they have the same threshold voltage Vt. Also, since the source terminals of the transistors M1 and Ms are in common and the transistors M1 and Ms are driven by the same control signal Vg, the transistors M1 and Ms have the same gate-source voltage. The transistor Ms goes into the triode zone before the transistor M1 because of the voltage across the resistance Rs. In fact the drain-source voltage Vdss of the transistor Ms is Vdss=Vds−Rs*Iload/(n+1) where Iload is the output current. For this reason the mirror rate is not constant, and this introduces a large error on the measurement. This error cannot be reduced by using a small resistance Rs because the error amplifier has a limited sensitivity.